|
|
Input
Port
|
| 1.
port + 0 |
| MSB |
LSB
|
|
0
|
0
|
0
|
0
|
11
|
10
|
9
|
8
|
7
|
6
|
5
|
4
|
3
|
2
|
1
|
0
|
|
|
Input A/D data,
only D0 to D11
are useable, the highest nibble are 0.
|
| 2.
port + 2 |
| When
read this port means clear the interrupt signal that generated from
the adapter. |
|
| 3.
port + 6 |
| MSB |
LSB
|
15
|
14
|
13
|
12
|
11
|
10
|
9
|
8
|
7
|
6
|
5
|
4
|
3
|
2
|
1
|
0
|
|
| Digital
input channel. Before read this port, you must write FF value to this
port. |
|
4.
port + 8
Counter
0 I/O buffer (8254 IC). |
|
5.
port + 9
Counter
1 I/O buffer (8254 IC). |
|
6.
port + A
Counter
2 I/O buffer (8254 IC).
|
|
7.
port + B
Counter
control register (8254 IC). |
|
Output
Port+0
|
The output
port address+0 is
used to control A/D conversion. The low 8 bit control format is :
|
MSB
|
LSB
|
x
|
R2
|
R1
|
R0
|
C3
|
C2
|
C1
|
C0
|
1. Select A/D channel
number |
The C0 to C3 are used to select
input channel number.
|
C3
|
C2
|
C1
|
C0
|
Input
Channel
|
0
|
0
|
0
|
0
|
CH0
|
0
|
0
|
0
|
1
|
CH1
|
0
|
0
|
1
|
0
|
CH2
|
0
|
0
|
1
|
1
|
CH3
|
0
|
1
|
0
|
0
|
CH4
|
0
|
1
|
0
|
1
|
CH5
|
0
|
1
|
1
|
0
|
CH6
|
0
|
1
|
1
|
1
|
CH7
|
1
|
0
|
0
|
0
|
CH8
|
1
|
0
|
0
|
1
|
CH9
|
1
|
0
|
1
|
0
|
CH10
|
1
|
0
|
1
|
1
|
CH11
|
1
|
1
|
0
|
0
|
CH12
|
1
|
1
|
0
|
1
|
CH13
|
1
|
1
|
1
|
0
|
CH14
|
1
|
1
|
0
|
1
|
CH15
|
|
2.
Select gain control factor
The R0 to R2 are used to select
gain control factor, if JP1 is short,
the R0 to R2 are disable
|
|
R2
|
R1
|
R0
|
Gain Control Factor
|
|
0
|
0
|
0
|
*1
|
|
0
|
0
|
1
|
*2
|
|
0
|
1
|
0
|
*3
|
|
0
|
1
|
1
|
*4
|
|
1
|
0
|
0
|
*5
|
|
1
|
0
|
1
|
*6
|
|
1
|
1
|
0
|
*7
|
|
1
|
1
|
1
|
*8
|
|
|
The gain control
factor is used to scale your input voltage. For example, if you select
unipolar and its voltage range from 0 to 20V, and the gain control
factor is *8, then your input voltage range is from 0 to 2.5V, because
whole the input voltage was scale 8 times.
|
3.
Sampling and hold
The ¡§x¡¨ bit is used to control
sampling and hold, when write 0 to this bit, it latch the input voltage
to let A/D converter get the input voltage, otherwise when write 1 to
this bit, it enter sampling mode. Normally, this bit is 1.
|
|
X
bit value
|
Action
|
0
|
Hold
|
1
|
Sampling
|
|
The high 8 bit control format of port address+0 is:
|
MSB
|
LSB
|
X
|
X
|
X
|
TR1
|
INT
|
ENX
|
SE1
|
SE0
|
|
4. Select trig
method
The SE0 and SE1 are used to
select trig method for A/D converter, user can select software trig,
external hardware trig or trig by 8254.
|
|
SE1
|
SE0
|
Selection
|
0
|
0
|
Software
trigger by TRI bit
|
0
|
1
|
Software
trigger by TRI bit
|
1
|
0
|
External
trig from J1-2
|
1
|
1
|
Trig
by 8254
|
|
5.
Enable/disable external hardware trig
ENX is used to enable/disable
external hardware trig, when this bit is set to 0, it means disable
external trig, otherwise this bit is set to 1 means enable external
trig. When user select external hardware trig, he must connect external
signal to J1 pin 2. When 8254 trig is selected, this bit must be set to
1.
|
ENX
|
Enable/Disable
|
0
|
Disable
external trig
|
1
|
Enable
external trig
|
|
6.
Enable/disable interrupt
INT is used to enable/disable
interrupt. If user enable interrupt, then after A/D conversion is
finish, the hardware will generate interrupt. To set this bit to 0
means disable interrupt, otherwise set this bit to 1 to enable
interrupt.
|
INT
|
Enable/Disable
|
0
|
Disable
interrupt
|
1
|
Enable
interrupt
|
|
7.
Start software trig
TRI is used to start software
trig. Normally, this bit is 0, when user start software trig, he must
set this bit to 1, to let A/D converter start to convert. This software
trig is enable while the signal from 0 to 1.
|
TRI
|
Enable/Disable
|
0
|
Normal
|
1
|
Start
software trig
|
|
8.
Start 8254 trig
When user select trig by 8254
(SE1=1 and SE0 =1), he must enable the gate by set ENX bit. The clock
rate of 8254 is 1M, it is connected to counter 0, then the output of
counter 0 is connected to counter 1, so that user need divide the clock
by counter 0 then divide it by counter 1. The divided clock rate of
counter 1 is used to trig A/D conversion.
|
|
|
Data
Output Port
|
1.
port + 2
| MSB |
LSB
|
|
0
|
0
|
0
|
0
|
11
|
10
|
9
|
8
|
7
|
6
|
5
|
4
|
3
|
2
|
1
|
0
|
The 12
bit D/A output channel 1. |
|
2.
port + 4
| MSB |
LSB
|
|
0
|
0
|
0
|
0
|
11
|
10
|
9
|
8
|
7
|
6
|
5
|
4
|
3
|
2
|
1
|
0
|
The 12
bit D/A output channel 2. |
|
3.
port + 6
| MSB |
LSB
|
|
15
|
14
|
13
|
12
|
11
|
10
|
9
|
8
|
7
|
6
|
5
|
4
|
3
|
2
|
1
|
0
|
Digital
output channel. |
4.
port + 8
counter 0 I/O buffer (8254 IC). |
5.
port + 9
counter 1 I/O buffer (8254 IC).
|
6.
port + A
counter 2 I/O buffer (8254 IC).
|
7.
port + B
counter control register (8254 IC).
|
|
|
|